Free ip cores 

The following is a list of free IP Cores developed by ASICS.ws. These IP cores have been deposited at OpenCores for free download. Please email us if you need to have an IP core modified or adjusted to meet your needs.
Most of our IP Cores feature the WISHBONE SoC bus. This is an Open and Free SoC bus. To find out more about the WISHBONE SoC bus please visits it's home page. All Free IP Cores are distributed under a modified BSD for Resume style license.
Please Note: We provide full technical support for most IP Cores featured on the OpenCores web site. Please email us with specific inquiries.


S.No IP Core FPGA ASIC WISH BONE OTHER I/F INFO
Networking, Communications, Connectivity
1 USB 1.1 Phy USB, UTMI
2 USB 1.1 Device IP Core UTMI
3 USB 2.0 Device IP Core UTMI
4 Asynchronous Serial IO Controller RS232
5 Single Slot PCM Controller TDMI
6 AC97 Controller IP Core AC97
7 I2C Master Controller I2C
8 ATA/ATAPI Host Controller ATA, ATAPI
9 Motorola DragonBall/68K to Wishbone Bridge Mot. 68K/ DragonBall
10 Enhanced Motorola MC68HC11 SPI IP Core Mot. MC68HC11 SPI Po
CPU, DSP, uControllers, etc.
1 Mini-Risc CPU/Microcontroller (PIC Clone) IP Core 3 x 8bit I/O Ports
2 Open 54x DSP clone
Encryption / Decryption
1 DES IP Core
2 Triple DES
3 AES (Rijndael) IP Core
Math / Arithmetic Cores
1 Single Precision FPU (IEEE-754 compliant) IP Core
2 CORDIC Core
3 Hardware Dividers
Misc. Building Blocks
1 Generic FIFOs
2 DMA/Bridge IP Core
3 WISHBONE Interconnect Matrix
4 Simple General Purpose IO 8 bit GPIO
5 Simple Programmable Interrupt Controller 8 interrupt sources
6 WISHBONE to OPB and OPB to WISHBONE wrappers (for Xilinx EDK only) OPB
Memory Controllers, Interfaces
1 Advanced Memory Controller IP Core SDRAM, SSRAM, FLASH
2 SSRAM Interface SSRAM
Video (CRT, LCD) Controllers, Interfaces, etc.
1 VGA/LCD Controller RGB
2 Video Compression System
3 8x8 DCT, fully pipelined
4 QNR, Quantization
5 Huffman Encoder
6 Huffman Decoder